In the manufacturing of wafers, integrated circuit devices such as transistors are first formed at the surfaces of semiconductor substrates in the semiconductor wafers. Interconnect structures are then formed over the integrated circuit devices. Bumps are formed on the surfaces of the semiconductor wafers, and are electrically coupled to integrated circuit devices. The semiconductor wafers are sawed into semiconductor chips, also commonly known as dies.
In the packaging of the semiconductor chips, the semiconductor chips are often bonded with package substrates using flip-chip bonding. Solder bumps are used to join the bumps in the semiconductor chips to the bond pads in the package substrates. Underfill is used to protect the solder bumps.
FIG. 1 illustrates an exemplary bond structure for bonding chip 202 and package substrate 204. Solder bump 210 is used to bond metal feature 212 (such as an under-bump metallurgy (UBM)) in chip 202 to bond pad 214 in package substrate 204. Polyimide layer 220 is formed on the surface of chip 202. Underfill 216 is filled between chip 202 and package substrate 204, and is in contact with polyimide layer 220. The structure as shown in FIG. 1 suffer from delamination between underfill 216 and polyimide layer 220, The delamination is caused due to process issues such as the warpage resulted from the high stress near the interface between underfill 216 and polyimide layer 220. The stresses also result in the growth of any delamination in the lateral directions.